#include "ScnsW25qxx.c.h"

#if defined(SCNS_W25QXX_ENABLE)&&SCNS_W25QXX_ENABLE==1

#include "quadspi.h"

const ScnsBspW25qxxConfig scnsBspW25qxxConfig[SCNS_W25QXX_MAX]={
    {.isQspi=1,},
};

ScnsStatus scnsBspW25qxxQspiSendCmd(ScnsW25qxxEnum w25N,uint32 instruction,uint32 instructionMode,uint32 address,uint32 addressMode,uint32 addressSize,uint32 dataMode,uint32 dataSize,uint32 alternateBytes,uint32 alternateByteMode,uint32 alternateBytesSize,uint8 needDummy)
{
    QSPI_CommandTypeDef Cmdhandler;

    Cmdhandler.Instruction=instruction;
    Cmdhandler.InstructionMode=instructionMode;

    Cmdhandler.Address=address;
    Cmdhandler.AddressSize=addressSize;
    Cmdhandler.AddressMode=addressMode;

    Cmdhandler.AlternateBytes=alternateBytes;
    Cmdhandler.AlternateBytesSize=alternateBytesSize;
    Cmdhandler.AlternateByteMode=alternateByteMode;
    Cmdhandler.DummyCycles=needDummy?6:0;

    Cmdhandler.DataMode=dataMode;
    Cmdhandler.NbData=dataSize;

    Cmdhandler.DdrMode=QSPI_DDR_MODE_DISABLE;
    Cmdhandler.DdrHoldHalfCycle=QSPI_DDR_HHC_ANALOG_DELAY;
    Cmdhandler.SIOOMode=QSPI_SIOO_INST_EVERY_CMD;

    scnsCheckSTM32HALStatus(HAL_QSPI_Command(&hqspi,&Cmdhandler,HAL_QPSI_TIMEOUT_DEFAULT_VALUE));
    return SCNS_STATUS_OK;
}

ScnsStatus scnsBspW25qxxQspiEnterMemoryMapped(ScnsW25qxxEnum w25N,uint32 instruction,uint32 instructionMode,uint32 addressMode,uint32 addressSize,uint32 dataMode,uint32 alternateBytes,uint32 alternateByteMode,uint32 alternateBytesSize,uint8 needDummy)
{
    QSPI_CommandTypeDef Cmdhandler;
    QSPI_MemoryMappedTypeDef s_mem_mapped_cfg;
    Cmdhandler.Instruction=instruction;
    Cmdhandler.InstructionMode=instructionMode;

    Cmdhandler.Address=0;
    Cmdhandler.AddressSize=addressSize;
    Cmdhandler.AddressMode=addressMode;

    Cmdhandler.AlternateBytes=alternateBytes;
    Cmdhandler.AlternateBytesSize=alternateBytesSize;
    Cmdhandler.AlternateByteMode=alternateByteMode;
    Cmdhandler.DummyCycles=needDummy?6:0;

    Cmdhandler.DataMode=dataMode;
    Cmdhandler.NbData=0;

    Cmdhandler.DdrMode=QSPI_DDR_MODE_DISABLE;
    Cmdhandler.DdrHoldHalfCycle=QSPI_DDR_HHC_ANALOG_DELAY;
    Cmdhandler.SIOOMode=QSPI_SIOO_INST_ONLY_FIRST_CMD;
    s_mem_mapped_cfg.TimeOutActivation=QSPI_TIMEOUT_COUNTER_DISABLE;
    s_mem_mapped_cfg.TimeOutPeriod=0;
    scnsCheckSTM32HALStatus(HAL_QSPI_MemoryMapped(&hqspi,&Cmdhandler,&s_mem_mapped_cfg));
    return SCNS_STATUS_OK;
}

ScnsStatus scnsBspW25qxxQspiR(ScnsW25qxxEnum w25N,uint8 buf[])
{
    scnsCheckSTM32HALStatus(HAL_QSPI_Receive(&hqspi,buf,HAL_QPSI_TIMEOUT_DEFAULT_VALUE));
    return SCNS_STATUS_OK;
}

ScnsStatus scnsBspW25qxxQspiW(ScnsW25qxxEnum w25N,const uint8 buf[])
{
    scnsCheckSTM32HALStatus(HAL_QSPI_Transmit(&hqspi,(uint8*)buf,HAL_QPSI_TIMEOUT_DEFAULT_VALUE));
    return SCNS_STATUS_OK;
}

#endif
